Programming FPGAs in a High-Level Language

© ASTRON

FPGAs are typically programmed in a Hardware-Description Language like VHDL or Verilog, which is difficult, time consuming, and error prone. The availability of a new toolkit allows programming FPGAs in a high-level language (OpenCL). The toolkit has the potential to become a game changer, as it promises much faster firmware development.

We experimented with this toolkit, for research purposes and to evaluate its practical suitability for future FPGA application development. We developed an OpenCL Board-Support Package, that allows us to run OpenCL applications on a UniBoard2 (top-right image). We also developed an OpenCL application that filters digitized samples from a LOFAR Low-Band Antenna through a PolyPhase Filter bank. The filter consists of an array of FIR filters and an FFT (bottom-left image), functionally similar to the filter at the LOFAR stations. Then, the program sends the output data in UDP packets over a 40 Gb/s fiber to the DAS-5 computer cluster, where we capture the packets on a regular server machine. The bandpass of the LOFAR antenna (top-left image) demonstrates that the high-level programming approach works, at least for rapid prototyping. We now investigate if the programming environment is suitable for production-quality applications, such as the LOFAR 2.0 station firmware.

This is not the first success of the Triple-A 2 and DEEP-EST projects, through which we explore high-level programming of FPGAs. Earlier, we successfully implemented the Image-Domain Gridding imaging algorithm on an Arria 10 FPGA. A paper that compares CPU, GPU, and FPGA imaging received a best-paper award at the Euro-Par'19 conference (bottom-right image). A big thanks to our funding agencies (NLeSC, EU)!